User Feedback on PCIe Adapter Experiences
Objective:
This document serves as a preliminary draft aimed at gathering feedback from users regarding their experiences with PCIe adapters, specifically focusing on observed patterns and issues that may warrant further investigation and potential bug fixes.
Feedback Submission Guidelines:
To streamline the feedback process, please prefix your questions with the following format: “Nickname-Question-#”. For example, use “aBav. Normie-Pleb-Question-1”. This format will facilitate easier searching within the thread for any queries marked with “-Question-”.
Context:
The motivation behind this discussion stems from extensive personal experience with various PCIe adapters, which has led to numerous challenges. Through this experience, I have begun to identify recurring patterns that could be pivotal in advocating for necessary bug fixes.
Observations:
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Adapter Performance Variability:
- Many PCIe adapters exhibit inconsistent performance, often influenced by the quality of U.2 cables used. For instance, while individual Gen3 NVMe SSDs can perform close to their native speeds, subpar cables can lead to significant performance degradation and errors, such as WHEA 17.
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Hot-Plugging Capabilities:
- The ability to hot-plug NVMe SSDs in Windows without system crashes is a notable advantage. However, compatibility issues arise with certain PLX chips, which are sensitive to firmware variations.
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Testing Configurations:
- I intend to evaluate the Delock 90504 adapter with TrueNAS and ESXi setups. Initial findings suggest that cosmetic driver issues in Device Manager do not impact overall functionality.
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Chain of Passive Adapters:
- Attempts to establish a chain of passive adapters (M.2-to-SFF-8643 + SFF-8643-to-SFF-8639) have consistently resulted in PCIe bus errors under full load conditions when utilizing Gen4 speeds.
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Error Management:
- While Gen3 configurations do not present significant issues—even with additional U.2 SSD hot-swap bays—Gen4 setups frequently generate error logs during data transfers, which is undesirable.
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Future Testing:
- I plan to explore M.2-to-PCIE-to-U.2 configurations and would appreciate any shared findings from others who have tested similar setups.
Conclusion:
This draft aims to create a collaborative environment where users can share insights and experiences related to PCIe adapters. Your contributions are invaluable in identifying patterns that could lead to improvements in hardware performance and reliability.
Call for Participation:
I encourage all participants to share their experiences and findings related to PCIe adapters in the specified format above. Thank you for your contributions!